Join Us for Accellera Day at DVCon U.S. 2022

Monday, February 28, 2022
Virtual

DVCon U.S. 2022 will be held February 28 - March 3 on a virtual platform and will offer attendees a combination of recorded presentations and live Q&A to provide an interactive, high-quality virtual experience.

Keeping with tradition, Accellera Day opens the conference on February 28 with a day focused on standards development. In addition, a Birds of a Feather meeting will be held Wednesday, March 2.

Registration is now closed. Registration for the keynote, panels, UVM Birds of a Feather, and exhibits was free.

Portable Stimulus Working Group Tutorial

“PSS in the Real World”

Monday, February 28
9:00-11:00am

The tutorial will highlight the power and flexibility of Accellera’s Portable Stimulus Standard by walking through several real-world examples. Beginning with a brief overview of the standard, presenters will show how to use PSS to model stimulus for a variety of applications, from which multiple target-specific test implementations may be generated.

UVM-AMS Working Group Workshop

“An Update on the Accellera UVM-AMS Standard”

Monday, February 28
11:30am-12:30pm

The UVM-AMS Working Group was formed with a charter to develop a standard that will provide a unified analog/mixed-signal verification methodology based on UVM, with major focus on transient analysis. The UVM-AMS standard will provide a comprehensive and unified analog/mixed-signal verification methodology based on UVM to improve analog/mixed-signal (AMS) and digital/mixed-signal (DMS) verification of integrated circuits and systems. This will encourage support by tool and IP providers, offering ready-to-use analog/mixed-signal verification IP that can be integrated easily into a UVM-AMS testbench. It will raise the productivity and quality of analog/mixed-signal verification across projects and applications, thanks to the reuse of proven verification components and stimuli. In this workshop, the working group will share the findings, requirements, and ideas collected so far and the next step plan for developing the proposed standard. Aspects under consideration for the UVM-AMS standard will be discussed at high level in this workshop.

In addition, an example will be provided to illustrate how UVM-AMS may be deployed to easily augment an existing UVM environment to verify an analog/mixed-signal device under test.

Presenters will conclude with an opportunity for attendees to ask questions and comment on the proposed standard.

IP Security Assurance Working Group Workshop

“An Overview of the Security Annotation for Electronic Design Integration (SA-EDI) Standard”

Monday, February 28
1:00-2:00pm

The importance of security in the electronic systems on which many of us rely has become obvious to semiconductor design and manufacturing companies, but most hardware security assurance practices in the industry are still performed manually using proprietary methods. This approach is very expensive, time consuming, and error prone due to the ever-increasing complexity of systems. To address the issue, the Accellera IP Security Assurance (IPSA) Working Group was formed in 2018 by a team of security and EDA experts to work on developing a general and portable IP security specification standard to describe the IP security concerns (threat model) and to guide EDA vendors on how to produce security assurance collateral and use it for the automation of security verification. The specification was approved as an Accellera standard for Security Annotation for Electronic Design Integration (SA-EDI) in 2021.

During this workshop we will give an overview of this standard by going over the related collateral, methodology, a case study of the application of the standard, and the roadmap of the standard.

Functional Safety Working Group Workshop

“An Update on Accellera’s Emerging Functional Safety Standard”

Monday, February 28
2:30-3:30pm

This workshop presents an update on the work performed by Accellera’s Functional Safety Working Group over the past year and gives a preview of the white paper the group is planning to publish in 2022. The presentation first introduces the formalization of the Failure modes, effects, and diagnostic analysis (FMEDA) process and how it has led to the initial high-level definition of the data model, which will be the basis for the emerging functional safety standard.

The workshop will then provide detail on the data model and describe the necessary attributes to perform an FMEDA, followed by a description of some of the methodology discussions that are captured or assumed in the data model.

The workshop will also explore some directions connected to the development of the Functional Safety data format standard that the working group has identified and that will form the basis for the next steps for the working group.

UVM Working Group Birds of a Feather

Wednesday, March 2
1:00-2:00pm

During the UVM Birds of a Feather meeting at DVCon U.S. 2021, the Accellera UVM Working Group heard from users how backward compatibility issues held back migration to the latest library. The working group is preparing to release a new library version (targeted for summer 2022) that reduces these issues greatly.

At the 2022 meeting, the working group will present the expectations for this library, including the few remaining situations that may require user code updates, to again get feedback from the user community. There should also be time remaining for an open Q&A. Attendance to the Birds of a Feather is free, but registration through DVCon is required to access the platform.